- Level Awareness
- Duration 11 hours
- Course by The Linux Foundation
- Total students 2,460 enrolled
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Offered by
About
RISC-V, an open-standard computer architecture, is transforming processor design and software/hardware co-design, including enabling open source hardware implementations. This means that software development can occur alongside hardware development, accelerating the design process. Enroll today to develop your understanding of the RISC-V architecture and its ecosystem and get familiar with the RISC-V cores and system-on-chip.
This course is for junior level or higher university computer science, electrical and computer engineers and other technical students as well as others who would like to learn and experiment with RISC-V.
Upon completion, learners should be able to use RISC-V to improve security, power consumption and performance of processors and help shape the future of computer architecture.
What you will learn
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Understand and be able to use the RISC-V Computer Architecture
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Develop and compile C and RISC-V Assembly code for the RVfpga SoC
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Understand, use and extend the Input/Output System of the RVfpga SoC
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Understand and configure the microarchitecture of the VeeR EH1 CoreTM and test its different features using Performance Counters and industry-standard Benchmarks.
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Execute programs on the Nexys A7 board (optional) and simulate programs on different simulation tools: Whisper instruction set simulator (ISS); Verilator-based RVfpga-ViDBo; RVfpga-Pipeline; and RVfpga-Trace.
Syllabus
- Welcome!
- Chapter 1. Installation and Initial Demonstrations
- Chapter 2. C Programming with the RVfpga SoC
- Chapter 3. RISC-V Assembly Programming with the RVfpga SoC
- Chapter 4. RISC-V Function Calls
- Chapter 5. Mixing C and Assembly Functions in a Program
- Chapter 6. Introduction to Peripherals and Input/Output
- Chapter 7. More I/O: 7-Segment Displays
- Chapter 8. More I/O: Timers
- Chapter 9. Interrupts
- Chapter 10. Delving Deeper into the RISC-V VeeR Core
- Final Exam (Verified Track only)
Auto Summary
Explore the world of modern processor design with the "Computer Architecture with an Industrial RISC-V Core [RVfpga]" course, a comprehensive introduction into the influential and open-standard RISC-V architecture. Perfect for junior-level university students in computer science, electrical and computer engineering, and other technical fields, this course is also ideal for anyone eager to experiment with cutting-edge processor technology. Guided by the esteemed platform edX, this 11-week course delves into the intricacies of RISC-V, focusing on how its innovative open-source hardware implementations can streamline and accelerate the co-design of software and hardware. Learners will gain a thorough understanding of the RISC-V ecosystem, its cores, and system-on-chip integration. By the end of the course, students will have developed the skills to leverage RISC-V for enhancing the security, performance, and power efficiency of processors, positioning themselves at the forefront of the future of computer architecture. Enroll in the Professional subscription to access this transformative learning experience and elevate your expertise in IT and Computer Science.

Sarah Harris

Daniel Chaver-Martinez