- Level Foundation
- Duration 28 hours
- Course by Politecnico di Milano
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Offered by
About
New application domains demand ever increasing adaptability and performance. In order to cope with changing user requirements, improvements in system features, changing protocol and data-coding standards, and demands for support of a variety of different user applications, many emerging applications in communication, computing and consumer electronics demand that their functionality stays flexible after the system has been manufactured. Reconfigurable Systems-on-a-Chips (SoCs) employing different microprocessor cores and different types of reconfigurable fabrics are one attractive solution for these domains. The increasing prominence of reconfigurable devices within such systems requires HW/SW co-design for SoCs to address the trade-off between software execution and reconfigurable hardware acceleration. Dynamic reconfiguration capabilities of current reconfigurable devices create an additional dimension in the temporal domain. During the design space exploration phase, overheads associated with reconfiguration and hardware/software interfacing need to be evaluated carefully in order to harvest the full potential of dynamic reconfiguration. The course will introduce the student with the concept of reconfigurability in FPGAs, presenting the available mechanisms and technologies at the device level and the tools and design methodologies required to design reconfigurable FPGA-based systems. The course will present the different aspects of the design of FPGA-based reconfigurable systems, focusing in particular on dynamically self-reconfigurable systems. The design methodologies and tools required to design a dynamically-reconfigurable system will be introduced and described, together with the problems that need to be considered.Modules
A Common Vocabulary
1
Assignment
- Functionalities and their implementations
2
Videos
- Course introduction
- A Common Vocabulary
The 5 W's
1
Videos
- The 5 W's
Reconfigurable Computing as an Exstension of HW/SW Codesing
1
Videos
- Reconfigurable Computing as an Exstension of HW/SW Codesing
1
Readings
- Design methodology for partial dynamic reconfiguration: a new degree of freedom in the HW/SW codesign [suggested readings]
A Classification of Reconfigurations
1
Assignment
- Module Review
2
Videos
- A Classification of SoC Reconfigurations
- A Classification of SoMC Reconfigurations
1
Readings
- Performance of partial reconfiguration in FPGA systems: A survey and a cost model [suggested readings]
Reconfigurable Systems: opportunities and rationale
1
Assignment
- Reconfigurable System
2
Videos
- Scenarios where Partial Reconfiguration can be effective
- How to use FPGA Reconfiguration to face area issues
Partial Reconfiguration and how to manage its reconfiguration runtime overhead
1
Assignment
- Partial reconfiguration
6
Videos
- How to deal with the Reconfiguration runtime overhead
- Recurring modules to reuse them to reduce the Reconfiguration time
- Partial Reconfiguration to reduce the Reconfiguration runtime overhead
- Runtime management to explore alternative implementations
- Bitstreams relocation
- Bitstreams relocation and virtual homogeneity
4
Readings
- Operating system runtime management of partially dynamically reconfigurable embedded systems [suggested readings]
- Core Allocation and Relocation Management for a Self Dynamically Reconfigurable Architecture [suggested readings]
- A runtime relocation based workflow for self dynamic reconfigurable systems design [suggested readings]
- Partial Dynamic Reconfiguration in a Multi-FPGA Clustered Architecture Based on Linux [suggested readings]
Xilnx Design Flows through years
1
Assignment
- Abstractions
1
Videos
- Xilnx Design Flows through years
Xilinx Partial Reconfiguration Design Flows
5
Videos
- Partial Reconfiguration Design Flows
- Xilinx Difference Based Partial Reconfiguration
- Xilinx Module Based Partial Reconfiguration
- Xilinx Partial Reconfiguration (PR) Flow
- Module Based vs Partial Reconfiguration Design Flows
2
Readings
- Vivado Design Suite Tutorial, Partial Reconfiguration, UG947 (v2016.1) April 6, 2016 [suggested readings - handbook - PDF]
- Vivado Design Suite User Guide, Partial Reconfiguration, UG909 (v2016.1) April 6, 2016 [suggested readings - handbook - PDF]
Politecnico di Milano Partial Reconfiguration Research Initiatives
2
Assignment
- Politecnico di Milano Partial Reconfiguration Research Initiatives
- Design flows
3
Videos
- Rationale behind DRESD and the work done by the Politecnico di Milano
- From DRESD to CHANGE and ASAP, two new research initiatives from the Politecnico di Milano
- CAOS: from embedded to heterogeneous distributed FPGA-based computing systems
5
Readings
- Dynamic Reconfigurability in Embedded System Design [suggested readings]
- A design methodology for dynamic reconfiguration: the Caronte architecture [suggested readings]
- Floorplanning Automation for Partial-Reconfigurable FPGAs via Feasible Placements Generation [suggested readings]
- Heterogeneous exascale supercomputing: The role of CAD in the exaFPGA project [suggested readings]
- The Role of CAD Frameworks in Heterogeneous FPGA-Based Cloud Systems [suggested readings]
Towards distributed FPGA-based systems
1
Assignment
- Closing remarks and future directions
1
Videos
- Towards distributed FPGA-based systems
3
Readings
- Virtualized Execution Runtime for FPGA Accelerators in the Cloud [suggested readings]
- A cloud-scale acceleration architecture [suggested readings]
- Enabling Flexible Network FPGA Clusters in a Heterogeneous Cloud Data Center [suggested readings]
Course conclusion
1
Readings
- Conclusion
Auto Summary
Explore the fascinating world of FPGA computing systems with a focus on Partial Dynamic Reconfiguration in this Coursera course. Perfect for those in Personal Development, you’ll dive into adaptable system designs, understanding both hardware and software integration. Learn about reconfigurability in FPGAs, design methodologies, and tools over a comprehensive 1680-minute duration. Ideal for foundational learners, this course offers a starter subscription, guided by industry experts to help you master dynamically self-reconfigurable systems.

Marco Domenico Santambrogio