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Computer Architecture
  • Level Expert
  • Duration 50 hours
  • Course by Princeton University
  • Offered by

About

In this course, you will learn to design the computer architecture of complex modern microprocessors. All the features of this course are available for free. It does not offer a certificate upon completion.

Modules

Introduction

    • 1 Videos
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1 Videos

  • Course Introduction

Instruction Set Architecture, Microcode

    • 7 Videos
    • 1 Readings
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7 Videos

  • Course Overview
  • Motivation
  • Course Content
  • Architecture and Microarchitecture
  • Machine Models
  • ISA Characteristics
  • Recap

1 Readings

  • Readings

Homework

    • 1 Readings
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1 Readings

  • Problem Set 1 & 1A

Pipelining Review

    • 4 Videos
    • 1 Readings
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4 Videos

  • Microcoded Microarchitecture
  • Pipeline Basics
  • Structural Hazard
  • Data Hazards

1 Readings

  • Readings

Cache Review

    • 5 Videos
    • 1 Readings
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5 Videos

  • Control Hazards, Jumps
  • Control Hazards, Branch
  • Control Hazards, Others
  • Memory Technologies
  • Motivation for Caches

1 Readings

  • Readings

Superscalar 1

    • 5 Videos
    • 1 Readings
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5 Videos

  • Classifying Caches
  • Cache Performance
  • Superscalar 1
  • Basic Two-way In-order Superscalar
  • Fetch Logic and Alignment

1 Readings

  • Readings

Superscalar 2 & Exceptions

    • 4 Videos
    • 1 Readings
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4 Videos

  • Baseline Superscalar and Alignment
  • Interrupts and Bypassing
  • Interrupts and Exceptions
  • Introduction to Out-of-Order Processors

1 Readings

  • Readings

Superscalar 3

    • 5 Videos
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5 Videos

  • Review of Out-of-Order Processors
  • I2O2 Processors
  • I2O1 Processors
  • IO3 Processors
  • IO2I Processors

Homework

    • 2 Readings
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2 Readings

  • Problem Set 2
  • Problem Set 1 Solutions

Superscalar 4

    • 5 Videos
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5 Videos

  • Speculation and Branch
  • Register Renaming Introduction
  • Register Renaming with Pointers to IQ and ROB
  • Register Renaming with Values in IQ and ROB
  • Memory Disambiguation

VLIW 1

    • 5 Videos
    • 1 Readings
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5 Videos

  • Limits of Out-of-Order Design Complexity
  • Introduction to VLIW
  • VLIW Compiler Optimizations
  • Classic VLIW Challenges
  • Introduction to Predication

1 Readings

  • Readings

Homework

    • 2 Readings
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2 Readings

  • Problem Set 3
  • Problem Set 2 Solutions

VLIW2

    • 6 Videos
    • 1 Readings
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6 Videos

  • Scheduling Model Review
  • Review of Predication
  • Predication Implementation
  • Speculation Execution
  • Dynamic Events and Clustered VLIWs
  • Case Study: IA-64/Itanium

1 Readings

  • Readings

Review: Midterm

    • 1 Assignment
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1 Assignment

  • Midterm

Branch Prediction

    • 5 Videos
    • 1 Readings
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5 Videos

  • Branch Cost Motivation
  • Branch Prediction Introduction
  • Static Outcome Prediction
  • Dynamic Outcome Prediction
  • Target Address Prediction

1 Readings

  • Readings

Advanced Caches 1

    • 6 Videos
    • 1 Readings
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6 Videos

  • Basic Cache Optimizations
  • Cache Pipelining
  • Write Buffers
  • Multilevel Caches
  • Victim Caches
  • Prefetching

1 Readings

  • Readings

Advanced Caches 2

    • 4 Videos
    • 1 Readings
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4 Videos

  • Multiporting and Banking
  • Software Memory Optimizations
  • Non-blocking Caches
  • Critical Word First and Early Restart

1 Readings

  • Readings

Homework

    • 1 Readings
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1 Readings

  • Problem Set 3 Solutions

Memory Protection

    • 5 Videos
    • 1 Readings
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5 Videos

  • Memory Management Introduction
  • Base and Bound Registers
  • Page Based Memory Systems
  • Translation and Protection
  • TLB Processing

1 Readings

  • Readings

Homework

    • 1 Readings
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1 Readings

  • Problem Set 4 & 4A

Vector Processors and GPUs

    • 6 Videos
    • 1 Readings
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6 Videos

  • Address Translation Review
  • Cache and Memory Protection Interaction
  • Vector Processor Introduction
  • Vector Parallelism
  • Vector Hardware Optimizations
  • Vector Software and Compiler Optimizations

1 Readings

  • Readings

Multithreading

    • 6 Videos
    • 1 Readings
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6 Videos

  • Reduction, Scatter/Gather, and the Cray 1
  • SIMD
  • GPUs
  • Multithreading Motivation
  • Coarse-Grain Multithreading
  • Simultaneous Multithreading

1 Readings

  • Readings

Parallel Programming 1

    • 4 Videos
    • 1 Readings
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4 Videos

  • SMT Implementation
  • Introduction to Parallelism
  • Sequential Consistency
  • Introduction to Locks

1 Readings

  • Readings

Parallel Programming 2

    • 5 Videos
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5 Videos

  • Sequential Consistency Review
  • Locks and Semaphores
  • Atomic Operations
  • Memory Fences
  • Dekker's Algorithm

Small Multiprocessors

    • 5 Videos
    • 1 Readings
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5 Videos

  • Locking Review
  • Bus Implementation
  • Cache Coherence
  • Bus-Based Multiprocessors
  • Cache Coherence Protocols

1 Readings

  • Readings

Homework

    • 1 Readings
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1 Readings

  • Problem Set 4 Solutions

Multiprocessor Interconnect 1

    • 4 Videos
    • 1 Readings
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4 Videos

  • More Cache Coherence Protocols
  • Introduction to Interconnection Networks
  • Message Passing
  • Interconnect Design

1 Readings

  • Readings

Homework

    • 1 Readings
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1 Readings

  • Problem Set 5 & 5A

Multiprocessor Interconnect 2

    • 5 Videos
    • 1 Readings
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5 Videos

  • Networking Review
  • Topology
  • Topology Parameters
  • Network Performance
  • Routing and Flow Control

1 Readings

  • Readings

Large Multiprocessors (Directory Protocols)

    • 6 Videos
    • 1 Readings
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6 Videos

  • Credit Based Flow Control
  • Deadlock
  • False Sharing
  • Introduction to Directory Coherence
  • Implementation
  • Scalability of Directory Coherence

1 Readings

  • Readings

Homework

    • 1 Readings
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1 Readings

  • Problem Set 5 Solutions

Review: Final Exam

    • 1 Assignment
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1 Assignment

  • Final Exam

Auto Summary

Discover the intricate world of modern microprocessors with the "Computer Architecture" course, expertly designed for those in the Science & Engineering domain. Guided by Coursera, this advanced-level course empowers you to master the design of sophisticated computer architectures. With a comprehensive duration of 3000 minutes, the course provides an in-depth exploration of the subject matter, ensuring a thorough understanding of complex concepts. Although it does not offer a certificate upon completion, all the features are available for free, making it an invaluable resource for dedicated learners aiming to elevate their expertise in computer architecture. Ideal for experts, this course offers a robust learning experience without any financial commitment, available under the Starter subscription.

David Wentzlaff
Instructor

David Wentzlaff